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NCP3126
Current Limit Protection
In case of an overload, the low ? side (LS) FET will
conduct large currents. The regulator will latch off,
protecting the load and MOSFETs from excessive heat and
damage. Low ? side R DS(on) sense is implemented at the end
of each LS ? FET turn ? on duration to sense the current.
VOCTH
BG
Current
Flow
While the low side MOSFET is on, the V SW voltage is
compared to the user set internally generated OCP trip
voltage. If the V SW voltage is lower than OCP trip voltage,
an overcurrent condition occurs and a counter counts
consecutive current trips. If the counter reaches 7, the PWM
logic and both HS ? FET and LS ? FET are turned off. The
BG
Drive
regulator has to go through a Power On Reset (POR) cycle
to reset the OCP fault as shown in Figure 20.
Low Side
MOSFET
Current
PHASE
0V
VOCTH
Figure 20. Current Limit Trip
APPLICATION SECTION
and (1 * D) + OFF
T ON T
D + (eq. 3)
[ D + OUT 3 27.5% +
V OUT ) V LSD V 3.3 V
V IN * V HSD ) V LSD
V IN
D +
Design Procedure
When starting the design of a buck regulator, it is
important to collect as much information as possible about
the behavior of the input and output before starting the
design.
ON Semiconductor has a Microsoft Excel ? based design
tool available online under the design tools section of the
NCP3126 product page. The tool allows you to capture your
design point and optimize the performance of your regulator
based on your design criteria.
V OUT , V IN , the Low Side Switch Voltage Drop V LSD , and
the High Side Switch Voltage Drop V HSD .
1
F SW + T (eq. 2)
T T
12 V
(eq. 4)
Table 4. DESIGN PARAMETERS
Design Parameter
Input voltage (V IN )
Output voltage (V OUT )
Input ripple voltage (V INRIPPLE )
Output ripple voltage (V OUTRIPPLE )
Output current rating (I OUT )
Example Value
10.8 V to 13.2 V
3.3 V
300 mV
60 mV
3A
D
F SW
T
T OFF
T ON
V HSD
V IN
V LSD
V OUT
= Duty cycle
= Switching frequency
= Switching period
= High side switch off time
= High side switch on time
= High side switch voltage drop
= Input voltage
= Low side switch voltage drop
= Output voltage
Operating frequency
(F SW )
350 kHz
Inductor Selection
The buck converter produces input voltage V IN pulses that
are LC filtered to produce a lower DC output voltage V OUT .
The output voltage can be changed by modifying the on time
relative to the switching period T or switching frequency.
The ratio of high side switch on time to the switching period
is called duty ratio D. Duty ratio can also be calculated using
When selecting an inductor, the designer can employ a
rule of thumb for the design where the percentage of ripple
current in the inductor should be between 10% and 40%.
When using ceramic output capacitors, the ripple current can
be greater because the ESR of the output capacitor is smaller,
thus a user might select a higher ripple current. However,
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